StitchesΒΆ

When you start creating larger model projects, you may run into a situation where you have a large number of diagrams and want to connect them all together. You could make a big diagram that has all of the other diagrams as custom components , but you’ll quickly find that this results in a spaghetti-like mess of wires, as shown in this anonymized real-world example:

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CertSAFE provides stitches to address this issue. Stitches embody a number of design patterns that commonly occur when describing embedded software. A stitch is exactly like a diagram, except for two key differences: * Instead of a graphical 2-D layout, a stitch is displayed in a tabular format with lists of child units and variables. * A stitch cannot contain primitives, only other diagrams and stitches. Collectively, diagrams and stitches are called composite unit types because they are composed of other units rather than performing any logic on their own. The restriction that stitches can only contain other composite units forces modelers to place the actual logic of a system in diagrams where it is easily visible, ensuring that there cannot be “magic tables” that change the functionality of the system beyond connecting different pieces to each other.

In CertSAFE, the stitch editor looks like this:

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The left-hand table is the list of child units of the stitch, grouped by unit type. You can add more child units by dragging a diagram or stitch from the Projects view into the table in the stitch editor. You can rename a child unit by double-clicking on the name in the table.

The right-hand table is the list of variables in the stitch. Each variable shows below it the list of all of the child unit inputs and outputs that are connected to it. By default, when you add a child unit to a stitch, all of the child unit’s I/Os are automatically mapped to variables of the same name. This is convenient for the common case when the I/O names of your subsystems line up with each other and you just need to connect them together—simply drag all of the subsystems into a new stitch, and the matching names will be connected automatically. In the less common case where you want to assign different names to a child unit’s I/Os, you can simply drag the names of the child I/Os up and down between stitch variables in the right-hand table. Since it changes the name to which a child I/O is mapped, this is called custom name mapping.

Normally, you will want to have some of the variables in a stitch be inputs or outputs of the stitch so that you can use it meaningfully in another diagram or stitch. You can set variables as stitch I/Os by selecting the variables you are interested in and editing the “Input/Output” property in the Properties view.